प्रगत संगणन विकास केंद्र (सी-डैक) द्वारा 50 परियोजना अभियंता पदों के लिए भर्ती - हिंदी रोज़गार

All applicants must fulfill the essential requirements of the post and other conditions stipulated in the advertisement as on the last date for online registration of the application by the candidate. They are advised to satisfy themselves before applying that they possess at least the essential qualifications laid down for the post as on the last date for online registration of applications. No enquiry asking for advice as to eligibility will be entertained.

1. Post Name: परियोजना अभियंता –VLSI Design (Digital / Analog)

2. No. of Post: 08

3. Educational Qualification: Full time 1st Class B.E/ B. Tech in Electronics & Communication / Telecommunication / Electronics (Candidates who have only B.E. / B. Tech degree are not eligible to apply). AND Full time 1st class M.E/M. Tech in Micro-Electronics/ VLSI Design/ Electronics or equivalent. (Candidates who have passed out PG in the year 2019 or later are ONLY eligible to apply). A PG degree is MUST to apply for the post and candidates with only UG degree is NOT ELIGIBLE to apply. Candidates who are in the final semester are also eligible to apply and on getting selected, candidates need to the provide Provisional Certificate for ME/M Tech at the time of joining.

a.  Applicant who has qualified in GATE need to mention GATE score in the application and enclose a copy of GATE score card as well. However, it is NOT MANDATORY to qualify in GATE for applying for this post. In addition to B.E / BTECH OR ME/M. Tech, if the candidate has done any PG Diploma Course or equivalent (minimum duration of six months) in the areas of Digital VLSI Design / Analog Design / Analog Layout / Physical Design /Backend Design /   Verification etc. need to indicate the same in the application while applying. 

4. Desired Skill Set: Knowledge of RTL design, simulation, and modeling using VHDL/ Verilog/ System Verilog. Knowledge of Digital IC Design (Simulation/ Synthesis [ASIC/[email protected] FPGA]) Fundamentals of Computer Architecture, Arithmetic Units Design, Bus protocols Architecture and Design, Memory Controllers Design etc.

Basic understanding of IC physical design, CMOS layout design, VLSI process, Electron Device Characteristics, IC Fabrication Technologies and IC packaging.

M. Tech Project thesis in the areas of RTL design / VLSI Design / VLSI architecture / Digital ASIC Custom Design / Semi-custom ASIC Design etc. related topics are preferred.

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement , Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता –VLSI Design

2. No. of Post: 06

3. Educational Qualification: Full time 1st Class B.E/ B. Tech in Electronics & Communication / Electronics / VLSI Design / IC Design or Equivalent (Candidates who have passed out UG in the year 2019 or later are ONLY eligible to apply). AND PG Diploma Course or equivalent (minimum duration of six months) in the areas of Digital VLSI Design / Analog Design / Analog Layout / Physical Design /Backend Design /   Verification etc. or equivalent Post-qualification अनुभव is NOT MANDATORY.

OR Full time 1st Class B.E/ B. Tech in Electronics & Communication / Electronics / VLSI Design / IC Design or Equivalent (Candidates who have passed out UG in the year 2018 or later are ONLY eligible to apply). AND With 1 to 2 years of relevant अनुभव in the mentioned areas.

a. Post-qualification अनुभव is MANDATORY. If the candidate has done any PG Diploma Course or equivalent (minimum duration of six months) in the areas of Digital VLSI Design / Analog Design / Analog Layout / Physical Design /Backend Design /   Verification etc. need to indicate the same in the application while applying. Applicant who has qualified in GATE need to mention GATE score in the application and enclose a copy of GATE score card as well. However, it is NOT MANDATORY to qualify in GATE for applying for this post. 

4. Desired Skill Set: Basic knowledge of C & Assembly level programming and scripting. Good debugging, problem solving/ analytical skills. Good interpersonal skills and ability to work in a team.

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement , Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity.

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता – VLSI Architecture / VLSI Circuit / VLSI System / Microelectronic Circuit Design

2. No. of Post: 02

3. Educational Qualification: Full time 1st Class B.E/ B. Tech in Electronics & Communication / Telecommunication / Electronics or Equivalent AND Full time 1st class M.E/M. Tech in Micro-Electronics/ VLSI Design/ Electronics or Equivalent AND Full time PhD in the topics of VLSI Architecture / VLSI circuit design / VLSI System Design / Microelectronic Circuit Design. Candidates who have been awarded PhD degree are ONLY eligible to apply.

4. Educatioal Qualification: Processor Micro-architecture design Custom Instructions/Instruction Set Extensions Design and micro-architecture Secured Processor Approximate Arithmetic Circuits AI/ML Hardware Accelerators In-memory Compute Circuits Crypto Hardware Accelerators including for Post Quantum Crypto Schemes  

System On Chip / Network On Chip Interconnect Designs Analog Circuits

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement , Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity.

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता – Cryptography and Cryptanalysis Algorithms, Multi-Precision Library On GPUs  (CS)

2. No. of Post: 03

3. Educational Qualification: Bachelor Degree must be full time 1st Class B.E / B. Tech in Computer Science / Electronics & Communication (ECE) / Information Technology.and Full time 1st class M.E/M. Tech/MS in Computer Science / Information Security / Cyber Security /Cryptography or Equivalent.

4. Mandatory Skills: Excellent  knowledge of ‘C’ and Exposure to Shell Scripting Excellent  Knowledge of  Data Structures and Design of  Algorithms

Knowledge of Unix/Linux OS Knowledge of Python Programming 

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement, Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity.

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

7. Job Profile and Other Skills: Design and Development of Number Theoretical/Cryptographic Parallel Algorithms Design and Development of Multi-precision Arithmetic and Cryptographic Libraries on GPUs Technical Documentation/Publications/Patents अनुभव in C/C++ programming and algorithmic development is desirable.

Knowledge of Assembly Language Good debugging, problem solving / analytical skills.

a. Exposure to parallel programming(OpenMP/MPI)/GPU programming (CUDA/OpenCL) (Desirable) Knowledge of Cryptographic Algorithms and their Implementation Basic Knowledge of Theory of  Probability Knowledge of Discrete Mathematics Abstract Algebra and Number Theory (Desirable) Good interpersonal skills and ability to work in a team. Quick learner and ability to work on varied tasks

1. Post Name: परियोजना अभियंता – Cryptography and Cryptanalysis Algorithms, Multi-Precision Library On GPUs  (Mathematics)

2. No. of Post: 02

3. Educational Qualification: Full time First Class in Post Graduate Degree in Mathematics/Statistics or Equivalent (Mandatory) MS/M-Tech in Computer Science/Applied Mathematics//Information Security/Cryptography or equivalent (Desirable) MPhil/PhD in Mathematics (Desirable)

4. Mandatory Skills: Excellent knowledge  of  the following subjects: Abstract Algebra, Field Theory, Number Theory and Linear Algebra.

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement, Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity.

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता – Cyber Security Hardware Software Appliance

2. No. of Post: 11

3. Educational Qualification: 1st Class (60%) BE/ BTech  (Electronics & Communication / Telecommunication / Electronics / Computer Science & Engineering/Computer Engineering/  Information Technology) OR Post graduate degree in Science / Technology / Engineering / Computer Application or in relevant domain. Those candidates who are in the final  semester can apply for the post, However if selected, the joining shall be after passing final semester  examination only 

4. Desired skill sets: Embedded C & Advanced “C” Programming Micro Controller Programming Knowledge in Cryptographic protocols, Key generation and key exchange protocols Expertise in   VAPT, Infrastructure Audit, Web Application Security Testing, Secure Code Review,  database security, OWASP Top10, Mobile application In depth understanding of operating systems including RTOS and Networking and their patch management

a. Professional certifications in the area of cyber security and privacy Bio-metric/multi-factor/continuous authentication protocol design and deployment अनुभव अनुभव in managed security services Knowledge of emerging trends including Zero Trust Architecture, Quantum safe design, Privacy aware design Journal and Conference publications of repute.  

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement, Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity.

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता – System and Application Software UI/UX Engineering

2. No. of Post: 11

3. Educational Qualification: 1st Class (60%) BE/ BTech  (Electronics & Communication / Telecommunication / Electronics / Computer Science & Engineering/Computer Engineering/  Information Technology) OR Post graduate degree in Science / Technology / Engineering / Computer Application or in relevant domain. Those candidates who are in the final  semester can apply for the post, However if selected, the joining shall be after passing final semester  examination only 

4. Desired skill sets: System Software/HPC Application Software HPC Software  Architecture, Analysis and Design CPU/GPU/TPU programming Systems Programming

अनुभव in Model Based Engineering अनुभव in Formal Methods and Program Analysis Application Profiling, Hands on अनुभव in Parallel Application Programming & Debugging, HPC Profiler internals, Product development knowledge अनुभव in MPI/OpenMPI/... अनुभव with various processor architectures including ARM/Intel/PowerPC/RISC/CISC अनुभव with adapting Open Source Systems at kernel level and BSP level for specific applications and requirements

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement, Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

1. Post Name: परियोजना अभियंता – Quantum Computing

2. No. of Post: 07

3. Educational Qualification: 1st Class (60%) BE/ B Tech  (Electronics & Communication / Telecommunication / Electronics / Computer Science & Engineering/Computer Engineering/  Information Technology) OR Post graduate degree in Science / Technology / Engineering / Computer Application or in relevant domain. Those candidates who are in the final  semester can apply for the post, However if selected, the joining shall be after passing final semester  examination only 

4. Desired skill sets: Proven expertise in quantum computing, quantum algorithm analysis and design, quantum simulators Design thinking, full stack, scripting, product development अनुभव Knowledge of electronic devices, Measurement frameworks Python programming

5.Emoluments: Those selected will be governed by the C-DAC norms prevailing during the tenure of engagement. At present the वेतन and other benefits include Consolidated pay, Medical Reimbursement, Provident fund, Food / Canteen Subsidy, Leave Encashment, Gratuity

6. Duration of the position: Three Years – Extendable based on performance and availability of projects

Selection Procedure

1. MTS Below Group A Scientific and Technical (S & T) posts Selection processes viz. Written Test - The test will be of objective type covering English, Reasoning, Numerical Ability & Domain Knowledge, etc. or to specific functions/disciplines /Interview or as deemed fit by the management, will be deployed. परियोजना अभियंता : Screening, Written test (Technical) and Interview(s) Senior परियोजना अभियंता: Screening, Written Test  and Interview(s) C-DAC Adjunct Engineer : Screening and Interview(s)

2. The qualification and अनुभव prescribed are the minimum requirements and possession of the same does not automatically make the candidates entitled to be called for written test and / or selection processes. There will be an initial screening based on the academic records and other parameters given in the on-line application and for further selection process.

3. The management reserves the right to increase the minimum eligibility criteria/cut off limits, in the event of the number of applicants are more, for any post(s), at its discretion. Candidates will be selected on the basis of their academic credentials, अनुभव profile, written test marks (if any), performance in the test and such other selection processes/parameters, as adopted and deemed fit by management.

4. Mere fulfillment of the below mentioned qualifications etc., does not entitle a candidate to be called for written test. Where number of applications received in response to an advertisement is large, it may not be convenient or possible for the Organization to call all the candidates to participate in selection process.

5. The Organization may restrict the number of candidates to be called to participate in selection process to a reasonable limit, on the basis of qualifications and अनुभव higher than that of the minimum prescribed in the advertisement.

6. The candidates should, therefore, furnish all the qualifications and अनुभव possessed in the relevant field, over and above the minimum qualifications prescribed.Management reserves the right to change/modify the selection process at any time, during the process, at its discretion. The decision of the management will be final and binding.

आवेदन करने का तरीका (How to apply)

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